1. Field
Semiconductor devices and isolation techniques.
2. Background
In the fabrication/manufacture of devices on a substrate, such as circuit devices on a die or chip, it is often desirable to electrically isolate neighboring devices from one another in terms of device activity. For example, in an array of circuit devices that may form component parts of one or more integrated circuits on a chip, it is generally desirable to electrically isolate the electrical activity (e.g., current flow) within the device. In an array of memory devices, isolation of devices is desirable to maintain the integrity of the stored data (e.g., bits).
In terms of isolating devices formed in or on a semiconductor substrate, isolation is typically accomplished by forming passivation areas around active device areas by local oxidation of silicon (LOCOS) or shallow trench isolation (STI) techniques. Regarding STI techniques, a trench is formed by etching into the substrate to remove typically semiconductor material and the formed trenches are filled with a dielectric material such as silicon dioxide. In one example, to form the trench, an isotropic etch chemistry is used with the objective to form trench sidewalls generally orthogonal to the substrate surface (i.e., a straight-edged sidewall). Unfortunately, it is difficult to obtain trench sidewalls that are orthogonal to the substrate surface but instead such sidewalls are generally pro-grade (i.e., an angle between (1) an orthogonal projection at the trench edge and (2) the sidewall edge is less than 180xc2x0).
As spacing between circuit devices becomes increasingly close, the need for effective isolation from, for example, leakage currents, become important. Unfortunately, with pro-grade trench sidewalls, the possibility of stringers of conductive or partially conductive material exists between devices. Such stringers allow for current flow (e.g., leakage current) between the devices. In terms of memory devices, such stringers can cause a resistive path between neighboring bits causing isolation failure.
What is needed are improved isolation techniques and a device structure with improved device isolation.